All things in all posts will help you visualize about the way that computers work generally. Note that it is not the real structure of modern computers, but the way that modern computers work is nearly the same as in my posts. I am sure that if you understand about the way that computers work in my posts, you will easy to learn about all fields of computer afterward. Thank you !!!
We have learned about structures that comprise many logic devices in previous posts. These devices are ANDER, NOTTER, ORER and XORER. They will conduct logic operators on byte inputs. For example, with NOTTER, we will have output as negative of input, if the input is “10001000”, we will have the output is “01110111” and conversely.
We also know about the structure that helps us move one byte to the left one bit or move one byte to the right one bit. These structures are left shifter and right shifter in order. These structures can also be shortened by “SHL” and “SHR” in order. For example for “SHL”, with one byte of “10001000”, we will have another byte of “00010000” (assuming we have “0” as “carry in”).
The ANDER, NOTTER, ORER, XORER, SHL and SHR all will be referred to as “logic” structures. The “logic” word can mean something that derives from one or many other things. But this is not clear because the ADDER also has one byte as the output from two other bytes. But ADDER is not called “logic”.
We also have the structure that is used for calculating the summation of two bytes that is ADDER. The ADDER will be called the “arithmetic” structure. It is clear because it conducts arithmetic calculation on byte inputs.
In this post, we will build a structure that comprises both “logic” and “arithmetic” structures. This structure is called the arithmetic logic unit (ALU). The name of the structure also reflects the components of it. Yeah! This structure will comprise all the logic and arithmetic structure that I mentioned above.
Look at the diagram below to understand about this ALU:
First, you can see two byte inputs are “a” and “b”. Some structures receive two bytes as inputs (ANDER, ORER, XORER and ADDER). But some other structures receive one byte as input (SHL, SHR and NOTTER). Each of these structures will connect to one enabler.
Each of the enablers will connect with one of seven the outputs of decoder 3 x 8. You can see that we have an ‘op’ code (such as 000,...) that has three wires on the diagram. This ‘op’ is short for “operation”, it will decide which structure (ANDER, NOTTER, …) will output the result to the common bus “c” after the enabler by “turning on” corresponding enablers. Below is some code for logic and arithmetic structures to be “on”:
We have mentioned three inputs of ALU (two byte inputs and ‘op’ code). Now, we also have ‘carry in’ input, this ‘carry in’ input is used for three structures: SHL, SHR and ADDER. According to which structure performs the function, the ‘carry in’ bit will be used for that structure for the result on the common bus “c”.
We mentioned all inputs of ALU. Now, we will mention the output of the ALU. The common bus “c” will be the place where the result bytes from all structures are stored. The ‘carry out’ output will be output of one in three structures: SHL, SHR and ADDER. So, you can see that only when one in three structures perform function and the output bit of that structure is “1”, the “carry out” output will be “1”.
The “zero” output will be “1” when and only when the byte on common bus “c” is “00000000”. This thing I mentioned in a previous post. The last bits that are the output of ALU are “‘a’ larger” and ‘equal’. These bit outputs are the outputs of the comparator that we have learned.
You can see that having one code is not used. All seven codes are used for all seven structures. One code remaining is used for what? It is not used for anything. And you can see that bits: “‘a’ larger” and ‘equal’ are always outputted in every situation, no matter which structure is chosen.
So, when that eighth code is performed, the only function that we will have is a comparison of two byte input (“a” and “b”).
Now, we continue to conduct familiar work that is abstracting this ALU structure. Look at the diagram below to see this abstraction:
Check outputs and inputs again. We have two byte inputs, one ‘carry in’ bit, one three-bit ‘op’ code on the left. We have one common bus “c”, one ‘carry out’ bit, one “‘a’ larger” bit, one ‘equal’ bit and one ‘zero’ bit. It’s complete. Hope you like this post. Thanks for reading and see you later!!!
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