All things in all posts will help you visualize about the way that computers work generally. Note that it is not the real structure of modern computers, but the way that modern computers work is nearly the same as in my posts. I am sure that if you understand about the way that computers work in my posts, you will easy to learn about all fields of computer afterward. Thank you !!!
As I mentioned in the previous post, we want instructions to instruct the CPU to conduct proper things on bytes of data. So, when we “call” one instruction, many steps in stepper will be conducted automatically for that corresponding instruction. The instruction is also a form of abstraction. The instruction will represent one useful thing in computers, but we will not see the details.
What is the instruction? Yeah, it is a byte of binary code. This byte will contain many bits of parts that each of them will represent for something such as ALU operation, the registers that participate in the ALU operation,...The details of all instructions will be introduced in next posts. Now, we only need to remember them as a byte and this byte will instruct the way that CPU works.
Where is the location of instructions? How many components do the instructions have? OK, let’s look at the diagram below and then I will explain about it:
This is a diagram that we have seen in posts about CPU. Now, we will complete it with additional registers.
Computers will contain many programs for many purposes and each program will contain many instructions that I mentioned. To execute a program, computers must put the program in the RAM and execute every instruction in the program. So, we must put out instructions from the RAM and execute them in CPU.
In conclusion, the first thing that instructions instruct the CPU to work is putting out the instructions in the RAM.
When the instructions are put out from the RAM, it will be on the common bus. So, we need a structure that saves it and that structure will be called “instruction register” or short for it is “IR”. This structure will be the same as the register but it does not have an enable part, only a set part. When the “s” (set) bit is “on”, the instructions will go in the control unit for instructing the CPU to work.
In conclusion, we also have an IR that helps save the instructions on the bus into the control unit.
The program in RAM will contain consecutive instructions. When we complete one instruction, how can we come to the next instruction? That is a meaningful question. We will have another component that is used for saving the next address of the instruction in the RAM. It is called “instruction address register” or short for it is “IAR”.
The IAR is have the same structure to the normal register with enable part and set part for saving and transmitting byte of data on the bus.
Whenever the present instruction is completed, the address of the next instruction in the RAM will be enabled on the bus and will be used to put out the next instruction for IR. The address in the IAR will be increased by 1 by ALU operation and will be set to the IAR later.
In conclusion, we will also have an IAR that helps save the address of the next instruction in the RAM.
You can also see the way that programs in computers work. The first instruction is fetched from RAM then executed, the second instruction is fetched from the RAM then executed,...So, we can execute the entire program in this way. If an instruction is completed in seven cycles of clock or seven steps of the stepper and the clock works at several gigahertz, our computers can execute about hundred of millions to billions of instructions per second.
Note that the seventh cycle of the clock in the stepper will do nothing, so we can only have six cycles in the stepper for doing some work. And those six cycles will be called an “instruction cycle”. If the clock of our computer works at about one billion cycles per second, our computer will execute about 166666666 instructions per second. That is an enormous number.
Now, we will come to analyze the way that CPU performs the “fetch” stage. The “execute” stage will be mentioned in next posts. Let’s look at the diagram below to understand the “fetch” stage in the CPU:
In the diagram, you can see that we will use the first three steps of the stepper for this “fetch” stage. This stage will help load the instruction that has the address in the IAR into the CPU from the RAM and load the address of the next instruction into the IAR. This “fetch” stage is used by all instructions in computers and the “execute” stage is different among instructions in computers.
Maybe you wonder if the remaining three steps in stepper are used for what? The answer is that they are used for the “execute” stage of the instructions. The “fetch” stage will help transmit the instruction to the control unit and the “execute” stage will help analyze the bits parts in the instructions and use them for operations exactly.
Now, we only notice the “fetch” stage. So, let’s find out it step by step:
In step 1, the “bus 1” bit will be “on”, so the binary number “00000001” will go through “B” at the head of the ALU device. The IAR will be enabled, so the address of the instruction in the IAR will be on the bus. The MAR will be set, so the byte of address on the bus will go into and choose the corresponding address in the RAM.
The address on the bus also goes through “A” at the head of the ALU device and the ‘op’ code is “000” because the ‘op’ code is not set yet. Now, we have the binary number of “00000001”, the address of present instruction and the ‘op’ code of “000” (represent for addition) in the ALU, so we have the sum of the address and the “00000001” that is the address of the next instruction on the bus that goes into the ACC register.
Also in this step 1, the ACC register will be set, so the address of the next instruction will be saved in the ACC register. Finish the first step, we will have the address of RAM chosen by MAR and the address of the next instruction in the ACC register.
In step 2, the RAM will be enabled, so the instruction in the address that is being chosen will be on the bus. The IR will be set, so the instruction on the bus will go into the IR register. So, the instructions come to the control unit easily.
In step 3, the ACC register will be enabled, so the address of the next instruction will be on the bus. The IAR register will be set, so the address on the bus will be saved in the IAR. And then waiting for the next instruction cycle to retrieve the instruction that has this address in the RAM. Everything will be repeated and repeated until the last instruction of the program.
That is all about the “fetch” stage that all instructions must conduct to receive the instruction in the RAM. The “execute” stage will be mentioned in next posts. Hope you like this post. Thanks for reading and see you later!!!
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