All things in all posts will help you visualize about the way that computers work generally. Note that it is not the real structure of modern computers, but the way that modern computers work is nearly the same as in my posts. I am sure that if you understand about the way that computers work in my posts, you will easy to learn about all fields of computer afterward. Thank you !!!
Clock? Maybe you are thinking of your watch or clock on the computer screen to know the time, but that is not the thing that I want to mention. The clock that I want to mention is the device that controls the tempo of working in computers. What is it? Let’s discover with me.
Before going to the full version of this clock, we will start with simple things that help you easily understand the clock. First, looking at the diagram below:
As you can see, we have bit “X”, direction of time on the left and annotation of bit “X” states on the right. When the time is from the left to the right, the bit “X” will change the state periodically. So, the graph that bit “X” creates will be as in the diagram.
Bit “X” starts with the state of “off”, then changes state to “on”, then “off”, then “on”,... The thing that bit “X” changes from “off” to “on” will be called a “cycle” because the changing of state of “off” to “on” is conducted repeatedly on the graph. If you count the number of cycles, you can receive the number of eight cycles.
In reality, we can have one cycle whenever the bit “X” returns the primary state. For example, we can choose the point at the middle of time that bit “X” is in the state of “on”. By the time, we will meet another point that has the same states of the original point. So, we also have a “cycle”, because it occurs repeatedly. If you continue, you can receive another cycle.
One thing that I want to introduce is the number of cycles in a second. The number of cycles in a second is called “Hertz”. For example, if the graph above is in one second, we will have a structure that works at 8 Hertz (8 cycles in a second). But in reality, the speed of turning “on” and “off” of the bit “X” is very fast, and can be up to several billions times per second because this bit works based on the speed of electricity.
We have some units that are used for the number of cycles in a second. We can have: 1000 cycles per second = 1 kHz (kilohertz), 1000000 cycles per second = 1 mHz (megahertz), 1000000000 cycles per second = 1 gHz (gigahertz).
We have known the way that the graph above works. Now, how can we build the structure that works exactly as things that we described. OK! It’s very simple and you may be surprised about that structure. Look at the diagram below to see the diagram about this structure:
Oh my god! What a silly device! How can it work? Do not worry, let’s review it in more detail and you will realize the magic. When the output “clk” is “on”, you will have an input of “on” because of the connection between input and output. Then we have the output of “off” because the input of “on” goes through the NOT gate. If we continue, the output “clk” will turn into “on” again. It’s really so magical!!! The output “clk” changes between two states “on” and “off” continually.
Now, you can realize this device works exactly as the graph that we mentioned in the first part of this post. The “clk” output will be as the “X” bit in the graph. But, because this device works so fast based on electricity, we need more wire to slow that speed. Look at the diagram below to understand about this:
This structure is called a clock. This clock can work at up to the speed of several gigahertz, that is amazing speed. Now, you can understand both the structure and the way that the clock works. Next, we will come to some things that a clock needs for transporting data on the bus.
You have mentioned the way that CPU transport the data on the bus in a previous post. First, one register will be enabled for byte of data on the bus. Then, another register will set the “set” bit “on” to receive that byte of data and “off” afterward. You can see one thing: if you want the second register to receive and save that byte of data, the “set” bit of it must be “on” and “off” in the time that the “enable” bit of the first register “on”.
So, the interval of time that “set” bit is “on” must be in the interval of time that “enable” bit is “on”. To do this thing, we must conduct many things as below. Let’s follow them carefully. First, we will build one structure as below:
OK! Let’s show the action of this device into the graph that we learned at the first part of this post:
As you can see, the signal of output “clk d” will be delayed about one quarter of the cycle to the output “clk” because of the length wire that connects to the clock.
Now, we will connect these two outputs to an AND gate and an OR gate. And we will have the structure below:
On the diagram, you can see that the output “clk e” will be “on” only when “clk” or “clk d” or both are “on”. And the output “clk s” will be “on” only when “clk” and “clk d” both “on”. Let’s demonstrate these output on graph to understand it easily:
You can see on the graph exactly that “clk e” output will be “on” in the interval of time that “clk d” or “clk” or both are “on”. And the “clk s” will be “on” in the interval of time that “clk” and “clk d” both “on”. And one more thing that you can see is that the interval of time that “clk s” “on” will be in the interval of time that “clk e” “on”.
The “clk s” and “clk e” that we mention are short for the “clock set” and “clock enable” in order. And as I demonstrated above, the data will be moved between registers easily by this device because the time that “set” bit “on” and “off” is in the time of “enable” bit “on”:
You can illustrate the way that the clock works: When “clk e” of the first register “on”, the byte of data will take some time to go on the bus. Then, the “clk s” of the second register “on” and save the byte of data and “off” afterward. Finally, the “clk e” “off” and the process of moving the byte of data end.
By connecting the “clk e” to the “from” register and “clk s” bit to the “to” register, the byte of data in “from” register will come to save in “to” register. We do not connect these clock bits directly to registers of course, we connect the clock to registers through intermediate structures to assure one register is “enable” and one register is “set”. But all of the “enable” and “set” bits must come to these clock bits.
Now, we will abstracting this clock in the CPU as below:
Three outputs: “clk”, “clk e” and “clk s” will be used on the computer. Hope you like this post. Thanks for reading and see you later!!!
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